Friday, November 30, 2012
DOE announces SBIR/STTR funding deadlines for GaN manufacturing projects
The US DOE has sponsored another round of Small Business Innovation Research and Technology Transfer funding opportunities, with subtopics in bulk GaN substrates, epitaxial growth and device redesign.
The US Department of Energy (DOE) Office of Science has announced that it has sponsored another round of Small Business Innovation Research (SBIR) and Small Business Technology Transfer (STTR) funding opportunities. Included in the opportunities is Topic 11, "Wide bandgap semiconductors for energy efficiency and renewable energy," which are funded at the levels of $150,000 for Phase 1 of the projects and $1 million for Phase II. Parties interested in applying for the grants should note that the deadline for the short letter-of-intent submission is September 4 and if a full application is invited, it is due October 16.
The published subtopics contained in Topic 11 are intentionally broad and general in order to promote maximum participation and innovation, but have performance goals and metrics based on the DOE SSL Multi-Year Program Plan. Within the wide bandgap semiconductors topic, grant applications are being sought in three subtopic areas: bulk GaN substrates and novel architectures; advances in epitaxial growth; and device redesign and passive components.
The first subtopic solicits applications that offer cost-effective, practical, and scalable solutions to the problem of native GaN substrate production (i.e., GaN-on-GaN). A long-term target involves the development of methods that allow scaling of GaN wafers to 150 mm and 200 mm diameter with dislocation density below 104/cm2 at costs that do not exceed 2-3X that of silicon wafers. Additionally, novel technological approaches that rely on nanoscale or other unique architectures are strongly encouraged as long as they illustrate a clear path to commercial-scale device production.
The second subtopic targets the potential to reduce defect densities by an order of magnitude for epitaxial processes involving GaN growth on one or more of silicon, sapphire and SiC, or SiC-on-SiC. Candidate grants should describe the method for reducing defect densities including the novel epitaxial process description and the integration of in situ metrology into the production process. Again, cost should not exceed 2-3X that of a silicon process.
The device redesign subtopic targets end-user applications including microgrids and traction motors at 10-15 kV, electric vehicles at 600-1200V and small-scale commercial operations at 110-480V. Questions can be submitted at https://www.fedconnect.net/FedConnect/PublicPages/FedConnect_Ready_Set_Go.pdf.
The last time the DOE invited SBIR/STTR applications was in March of this year.